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Setting Up PolarFire SoC Video Kit for Bare-Metal Hello World

Devontae Reid
Devontae Reid
Technology Embedded PolarFire SoC

Recall Note: PolarFire SoC Video Kit Bare-Metal Setup

Date: 09/29/2026


Steps to Deploy:

  1. Program the Board First
  • Nothing boots without an FPGA image loaded. Download the latest release from the reference-design repo (MPFS_VIDEO_KIT_2024_06.zip for the MPFS250TS).
  • Connect the kit over USB, open FlashPro Express, and program the .job file — it bundles both the Libero fabric design and the Hart Software Services boot loader.
  • If using Libero you will need to open the FPGA project and in the left panel select "Run"
  1. Import an Example Project
  • Clone the examples repo:

                            git clone https://github.com/polarfire-soc/polarfire-soc-bare-metal-examples
                          
                        
  • In SoftConsole: File → Import → Existing Projects into Workspace, pointed at driver-examples/mss/mss-mmuart/mpfs-mmuart-polled.

  1. Add Video Kit Board Support (the part every guide skips)
  • Icicle Kit is the only board every example supports out of the box. Check src/boards/ inside the imported project — if all you see is icicle-kit-es, you need to add Video Kit yourself.

  • Grab design.xml from the polarfire-soc-video-kit-reference-design repo's XML/ folder — pick the variant matching whatever's actually programmed on your board.

  • Build this structure inside src/boards/mpfs-video-kit/:

                            fpga_design/design_description/design.xml
                            platform_config/<build-config>/mpfs_hal_config/mss_sw_config.h
                          
                        
  • Note: platform_config/ is per build configuration (ddr-release, lim-debug, lim-release) — copy mss_sw_config.h into each one you'll actually use, and repeat the include-path/build-step changes below per configuration via the dropdown at the top of Project Properties.

  1. Point the Build at the New Board
  • Project → Properties → C/C++ Build → Settings → "Build steps" tab, edit the Command:

                            python ../src/platform/soc_config_generator/mpfs_configuration_generator.py ../src/boards/mpfs-video-kit/fpga_design/design_description ../src/boards/mpfs-video-kit
                          
                        
  • Same Properties window → Tool Settings → GNU RISC-V Cross C Compiler → Includes, add:

                          "${workspace_loc:/${ProjName}/src/boards/mpfs-video-kit}"
                          "${workspace_loc:/${ProjName}/src/boards/mpfs-video-kit/platform_config}"
                        
                      
  1. Boot Mode, Terminal, Run
  • Clean and rebuild — this regenerates fpga_design_config/ headers from your new XML automatically.
  • Run → External Tools → "PolarFire SoC idle boot mode 0" for fast debug iteration.
  • Serial terminal: 115200 baud, 8 data bits, no parity, 1 stop bit.
  • Debug from SoftConsole — "Hello, World!" should land in the terminal.

Quick Commands Reference

  • Clone examples: git clone https://github.com/polarfire-soc/polarfire-soc-bare-metal-examples
  • Config generator: mpfs_configuration_generator.py <xml_dir> <board_dir>
  • Boot mode 0 (debug/iterate): PolarFire SoC idle boot mode 0
  • Boot mode 1 (flash to eNVM): PolarFire SoC non-secure boot mode 1

Checklist Before First Build

  • Board programmed via FlashPro Express (.job file)
  • Correct design.xml variant copied into src/boards/mpfs-video-kit
  • mss_sw_config.h copied into every build config you'll actually use
  • Build step command updated to point at the new board path
  • Include paths updated (per build configuration)
  • Clean build completed with no "unresolved inclusion" errors

📁 What Actually Matters From a Firmware Delivery

File Required? Purpose
design.xml Required MSS Configurator output — peripheral base addresses, clocks, DDR settings, memory map. Drop into fpga_design/design_description/, rebuild regenerates everything else.
design.cfg Optional MSS Configurator source file — only needed if you'll reopen the config in the GUI later.
.job file / bitstream Separate step Programs the FPGA fabric via FlashPro Express. Not part of the SoftConsole project at all.
HSS binaries Not needed for bare-metal Only relevant for boot mode 1 / Linux boot flow.

🔧 The Board-Support Gotcha, Explained

1. Board Support Doesn't Propagate Between Projects

  • Every SoftConsole project has its own independent src/boards/ folder. A new project you create or import starts out only knowing whatever boards are already in its own tree — usually just icicle-kit-es.
  • Fastest fix: once you've set up mpfs-video-kit in one project, copy that whole folder into any new project's src/boards/ — the XML and mss_sw_config.h don't change per project.

2. Build From a Template, Not From Scratch

  • applications/mpfs-blank-baremetal is Microchip's own "from scratch" starting point — per-hart entry files, MPFS HAL already wired in, and build configs for every memory target (LIM/eNVM/DDR) already set up with correct linker scripts.
  • Add Video Kit board support to it once, confirm it boots to a while(1), then keep that copy as your personal template for every new firmware project going forward.

3. Know Which Hart You're Actually Booting Into

  • PolarFire SoC has 5 harts (E51 monitor + 4x U54 application cores), each with its own file: src/application/hart0/e51.c through hart4/u54_4.c.
  • mss_sw_config.h's hart-enable settings control which cores actually boot into your code vs. sit idle — a lot of "why isn't my code running" traces back to writing code in u54_1.c while only E51 is configured to boot. E51 is the simplest starting point if unsure.
DR

Devontae Reid

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